1. Field of the Invention
The present invention relates to a signal processor for performing data processing in compliance with instructions, more particularly, to a signal processor capable of performing different processings in accordance with the value of a flag.
2. Description of the Prior Art
A signal processor for performing data processing in compliance with instructions is widely used for various apparatuses since it is capable of realizing various processings and functions by means of a program, which is a sequence of instructions.
The signal processor comprises an instruction decoder, an arithmetic unit and a data holding circuit. The instruction decoder decodes an instruction to generate a control signal and based on the control signal, data is read out from the data holding circuit. The arithmetic unit performs an operation designated by the control signal on the data being read out and the result of the operation is stored in the data holding circuit in accordance with the control signal. By performing such processing in compliance with instructions, various functions are realized.
A case will be considered where the following processing is performed by using the signal processor:
______________________________________ (Processing 1) if (A.gtoreq.B) then C=A; else C=B; ______________________________________
In Processing 1, data A and data B are compared and when the data A is greater, the data A is substituted as data C, otherwise the data B is substituted as the data C. That is, a different processing is performed according to the condition.
When this processing is performed with instructions, an instruction called a conditional branch instruction is used.
The conditional branch instruction is an instruction which causes the program to branch only when the value of a flag representative of the result of the previous operation is a specific value.
Processing 1 may be realized by the following combination of instructions (program):
______________________________________ cmp r1, r2 bge L1 nop mov r3, r2 ba L2 nop L1: mov r3, r1 L2: ______________________________________
In this program, reference designations r1, r2 and r3 represent registers for storing data used for the operation and the data A, B and C are stored in the registers r1, r2 and r3, respectively.
In this program, first, in compliance with a compare instruction cmp, the data B in the register r2 is subtracted from the data A in the register r1 and the result of the subtraction is set in a flag. When the subtraction result set in the flag is a positive value or 0, i.e. when the data A in the register r1 is equal to or greater than the data B in the register r2, a conditional branch instruction bge causes the program to branch to a label L1, otherwise the program does not branch but the succeeding instruction is executed. When the program branches to the label L1, the data A in the register r1 is stored in a register r3 as the data C in compliance with a move instruction mov. When the program does not branch, the data B in the register r2 is stored in the register r3 as the data C in compliance with the move instruction mov. Then, an unconditional branch instruction ba causes the program to unconditionally branch to a label L2. Processing 1 is thus realized.
In this signal processor, however, when the processing is changed by using a conditional branch instruction, time is necessary for executing the conditional branch instruction and for reading from a memory an instruction designating where to branch when the process branches. This reduces the processability of the signal processor.
In addition, a multiplicity of instructions are necessary such as branch instructions and instructions for each of the two different processings, so that the program size increases.
Furthermore, since the time for completing the processing varies according to the branch condition, when another apparatus uses the result of the processing, complicated control is necessary such as the adjustment of the operation timing of the apparatus.